Granted Patent
Utility
US 6,115,319 · App. 09/023,880
Dynamic RAM having word line voltage intermittently boosted in synchronism with an external clock signal
Inventors:
Yoshitaka Kinoshita, Kenji Nishimoto, Kazumasa Yanagisawa, Hitoshi Tanaka
Patented Case
View Patent ↗
Granted: Sep 5, 2000
Filed: Feb 13, 1998
Inventors
Yoshitaka Kinoshita
Kenji Nishimoto
Kazumasa Yanagisawa
Hitoshi Tanaka
Assignees (at issue)
HITACHI, LTD.
Hitachi VLSI Engineering Corp.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.