Granted Patent
Utility
US 6,124,735 · App. 09/209,967
Method and apparatus for a N-nary logic circuit using capacitance isolation
Inventors:
James S. Blomgren, Terence M. Potter, Stephen C. Horne, Michael R. Seningen, Anthony M. Petro
Patented Case
View Patent ↗
Granted: Sep 26, 2000
Filed: Dec 10, 1998
Inventors
James S. Blomgren
Terence M. Potter
Stephen C. Horne
Michael R. Seningen
Anthony M. Petro
Assignee (at issue)
INTRINSITY, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.