Granted Patent
Utility
US 6,124,762 · App. 09/266,886
Over-sampling type clock recovery circuit with power consumption reduced
Inventor:
Ichiro Yoshida
Patented Case
View Patent ↗
Granted: Sep 26, 2000
Filed: Mar 12, 1999
Inventor
Ichiro Yoshida
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.