Granted Patent
Utility
US 6,154,714 · App. 08/971,424
Method for using wafer navigation to reduce testing times of integrated circuit wafers
Inventor:
David Lepejian
Patented Case
View Patent ↗
Granted: Nov 28, 2000
Filed: Nov 17, 1997
Inventor
David Lepejian
Assignee (at issue)
Heuristic Physics Laboratories, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.