Granted Patent
Utility
US 6,156,595 · App. 09/168,518
Method of fabricating a Bi-CMOS IC device including a self-alignment bipolar transistor capable of high speed operation
Inventor:
Shigeki Sawada
Patented Case
View Patent ↗
Granted: Dec 5, 2000
Filed: Oct 8, 1998
Inventor
Shigeki Sawada
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.