IP Library Granted Patent US 6,233,707
Granted Patent Utility
US 6,233,707 · App. 09/179,626

Method and apparatus that allows the logic state of a logic gate to be tested when stopping or starting the logic gate's clock

Inventors: Terence M. Potter, James S. Blomgren, Anthony M. Petro, Stephen C. Horne
Patented Case View Patent ↗
Granted: May 15, 2001 Filed: Oct 27, 1998
Inventors
Terence M. Potter
James S. Blomgren
Anthony M. Petro
Stephen C. Horne
Assignee (at issue)
INTRINSITY, INC.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,233,707
App. No.
09/179,626
Filed
1998-10-27
Granted
2001-05-15
Kind
A