IP Library › Granted Patent US 6,269,427
Granted Patent Utility
US 6,269,427 · App. 09/271,493

Multiple load miss handling in a cache memory system

Inventors: Belliappa Kuttanna, Rajesh Patel, Michael D. Snyder
Patented Case View Patent ↗
Granted: Jul 31, 2001 Filed: Mar 18, 1999
Inventors
Belliappa Kuttanna
Rajesh Patel
Michael D. Snyder
Assignee (at issue)
International Business Machines Corporation

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Quick Facts
Patent No.
US 6,269,427
App. No.
09/271,493
Filed
1999-03-18
Granted
2001-07-31
Kind
A