Granted Patent
Utility
US 6,272,588 · App. 08/865,510
Method and apparatus for verifying and characterizing data retention time in a DRAM using built-in test circuitry
Inventors:
Thomas K. Johnston, Grady L. Giles, William Daune Atwell
Patented Case
View Patent ↗
Granted: Aug 7, 2001
Filed: May 30, 1997
Inventors
Thomas K. Johnston
Grady L. Giles
William Daune Atwell
Assignee (at issue)
Motorola, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.