Granted Patent
Utility
US 6,301,629 · App. 09/034,537
High speed/low speed interface with prediction cache
Inventors:
Bharat Sastri, Thomas Alexander, Chitranjan N. Reddy
Patented Case
View Patent ↗
Granted: Oct 9, 2001
Filed: Mar 3, 1998
Inventors
Bharat Sastri
Thomas Alexander
Chitranjan N. Reddy
Assignee (at issue)
Alliance Semiconductor Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.