IP Library › Granted Patent US 6,321,366
Granted Patent Utility
US 6,321,366 · App. 09/144,222

Timing-insensitive glitch-free logic system and method

Inventors: Ping-Sheng Tseng, Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen
Patented Case View Patent ↗
Granted: Nov 20, 2001 Filed: Aug 31, 1998
Inventors
Ping-Sheng Tseng
Sharon Sheau-Pyng Lin
Quincy Kun-Hsu Shen
Assignee (at issue)
Axis Systems, Inc

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Quick Facts
Patent No.
US 6,321,366
App. No.
09/144,222
Filed
1998-08-31
Granted
2001-11-20
Kind
A