Granted Patent
Utility
US 6,455,395 · App. 09/608,291
Method of fabricating silicon structures including fixtures for supporting wafers
Inventors:
James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Zehavi
Patented Case
View Patent ↗
Granted: Sep 24, 2002
Filed: Jun 30, 2000
Inventors
James E. Boyle
Robert L. Davis
Laurence D. Delaney
Raanan Zehavi
Assignee (at issue)
Integrated Materials, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.