Granted Patent
Utility
US 6,519,682 · App. 09/205,598
Pipelined non-blocking level two cache system with inherent transaction collision-avoidance
Inventors:
Nicholas J. Richardson, Charles A. Stack
Patented Case
View Patent ↗
Granted: Feb 11, 2003
Filed: Dec 4, 1998
Inventors
Nicholas J. Richardson
Charles A. Stack
Assignee (at issue)
STMICROELECTRONICS, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.