IP Library › Granted Patent US 6,532,581
Granted Patent Utility
US 6,532,581 · App. 09/345,485

Method for designing layout of semiconductor device, storage medium having stored thereon program for executing the layout designing method, and semiconductor device

Inventors: Masahiko Toyonaga, Kazuo Tsuzuki
Patented Case View Patent ↗
Granted: Mar 11, 2003 Filed: Jul 1, 1999
Inventors
Masahiko Toyonaga
Kazuo Tsuzuki
Assignee (at issue)
SUMITOMO ELECTRIC INDUSTRIES, LTD.

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Quick Facts
Patent No.
US 6,532,581
App. No.
09/345,485
Filed
1999-07-01
Granted
2003-03-11
Kind
B1