Granted Patent
Utility
US 6,581,126 · App. 09/315,412
Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters
Inventor:
Jack Regula
Patented Case
View Patent ↗
Granted: Jun 17, 2003
Filed: May 19, 1999
Inventor
Jack Regula
Assignee (at issue)
PLX Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.