Granted Patent
Utility
US 6,618,295 · App. 09/897,771
Method and apparatus for biasing selected and unselected array lines when writing a memory array
Inventor:
Roy E. Scheuerlein
Patented Case
View Patent ↗
Granted: Sep 9, 2003
Filed: Jun 29, 2001
Inventor
Roy E. Scheuerlein
Assignee (at issue)
MATRIX SEMICONDUCTOR, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.