Granted Patent
Utility
US 6,620,715 · App. 10/112,782
Method for forming sub-critical dimension structures in an integrated circuit
Inventors:
Alain Blosse, Saurabh Dutta Chowdhury
Patented Case
View Patent ↗
Granted: Sep 16, 2003
Filed: Mar 29, 2002
Inventors
Alain Blosse
Saurabh Dutta Chowdhury
Assignee (at issue)
Cypress Semiconductor Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.