Granted Patent
Utility
US 6,625,072 · App. 10/152,689
Semiconductor integrated circuit device provided with a self-testing circuit for carrying out an analysis for repair by using a redundant memory cell
Inventors:
Jun Ohtani, Tomoya Kawagoe
Patented Case
View Patent ↗
Granted: Sep 23, 2003
Filed: May 23, 2002
Inventors
Jun Ohtani
Tomoya Kawagoe
Assignee (at issue)
MITSUBISHI ELECTRIC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.