Granted Patent
Utility
US 6,638,146 · App. 10/022,415
Retention plate for polishing semiconductor substrate
Inventor:
Naoya Naruo
Patented Case
View Patent ↗
Granted: Oct 28, 2003
Filed: Dec 20, 2001
Inventor
Naoya Naruo
Assignee (at issue)
Sumitomo Mitsubishi Silicon Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.