Granted Patent
Utility
US 6,639,846 · App. 10/114,795
Method and circuit configuration for a memory for reducing parasitic coupling capacitances
Inventor:
Wolfgang Nikutta
Patented Case
View Patent ↗
Granted: Oct 28, 2003
Filed: Apr 2, 2002
Inventor
Wolfgang Nikutta
Assignee (at issue)
Infineon Technologies AG
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.