Granted Patent
Utility
US 6,667,212 · App. 10/394,565
Alignment system for planar charge trapping dielectric memory cell lithography
Inventors:
Hidehiko Shiraiwa, Jean Y. Yang, Kouros Ghandehari
Patented Case
View Patent ↗
Granted: Dec 23, 2003
Filed: Mar 21, 2003
Inventors
Hidehiko Shiraiwa
Jean Y. Yang
Kouros Ghandehari
Assignees (at issue)
Advanced Micro Devices, Inc.
Fujitsu Limited
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.