IP Library › Granted Patent US 6,670,227
Granted Patent Utility
US 6,670,227 · App. 10/361,455

Method for fabricating devices in core and periphery semiconductor regions using dual spacers

Inventors: Hsiao-Han Thio, Kei-Leong Ho
Patented Case View Patent ↗
Granted: Dec 30, 2003 Filed: Feb 10, 2003
Inventors
Hsiao-Han Thio
Kei-Leong Ho
Assignee (at issue)
Advanced Micro Devices, Inc.

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Quick Facts
Patent No.
US 6,670,227
App. No.
10/361,455
Filed
2003-02-10
Granted
2003-12-30
Kind
B1