IP Library › Granted Patent US 6,683,805
Granted Patent Utility
US 6,683,805 · App. 10/067,411

Suppression of leakage currents in VLSI logic and memory circuits

Inventors: Rajiv V. Joshi, Louis L. Hsu, Azeez Bhavnagarwala
Patented Case View Patent ↗
Granted: Jan 27, 2004 Filed: Feb 5, 2002
Inventors
Rajiv V. Joshi
Louis L. Hsu
Azeez Bhavnagarwala
Assignee (at issue)
IBM Corporation

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Quick Facts
Patent No.
US 6,683,805
App. No.
10/067,411
Filed
2002-02-05
Granted
2004-01-27
Kind
B2