IP Library › Granted Patent US 6,686,224
Granted Patent Utility
US 6,686,224 · App. 10/208,496

Chip manufacturing method for cutting test pads from integrated circuits by sectioning circuit chips from circuit substrate

Inventor: Kunihiko Higashi
Patented Case View Patent ↗
Granted: Feb 3, 2004 Filed: Jul 30, 2002
Inventor
Kunihiko Higashi
Assignee (at issue)
NEC Electronics Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,686,224
App. No.
10/208,496
Filed
2002-07-30
Granted
2004-02-03
Kind
B2