Granted Patent
Utility
US 6,686,267 · App. 10/298,915
Method for fabricating a dual mode FET and logic circuit having negative differential resistance mode
Inventor:
Tsu-Jae King
Patented Case
View Patent ↗
Granted: Feb 3, 2004
Filed: Nov 18, 2002
Inventor
Tsu-Jae King
Assignee (at issue)
Progressant Technologies, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.