IP Library › Granted Patent US 6,696,357
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US 6,696,357 · App. 10/195,716

Method for manufacturing semiconductor integrated circuit devices using a conductive layer to prevent peeling between a bonding pad and an underlying insulating film

Inventors: Toshinori Imai, Tsuyoshi Fujiwara, Tomohiro Shiraishi, Hiroshi Ashihara, Masaaki Yoshida
Patented Case View Patent ↗
Granted: Feb 24, 2004 Filed: Jul 16, 2002
Inventors
Toshinori Imai
Tsuyoshi Fujiwara
Tomohiro Shiraishi
Hiroshi Ashihara
Masaaki Yoshida
Assignee (at issue)
Renesas Technology Corporation

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Quick Facts
Patent No.
US 6,696,357
App. No.
10/195,716
Filed
2002-07-16
Granted
2004-02-24
Kind
B2