Granted Patent
Utility
US 6,751,583 · App. 09/933,579
Hardware and software co-simulation including simulating a target processor using binary translation
Inventors:
Neville Clarke, James R. Torossian
Patented Case
View Patent ↗
Granted: Jun 15, 2004
Filed: Aug 20, 2001
Inventors
Neville Clarke
James R. Torossian
Assignee (at issue)
VaST Systems Technology Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.