IP Library › Granted Patent US 6,751,764
Granted Patent Utility
US 6,751,764 · App. 09/909,742

Method and apparatus for testing and debugging a circuit

Inventors: Farideh Golshan, Sai V. Vishwanthaiah
Patented Case View Patent ↗
Granted: Jun 15, 2004 Filed: Jul 19, 2001
Inventors
Farideh Golshan
Sai V. Vishwanthaiah
Assignee (at issue)
Sun Microsystems Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,751,764
App. No.
09/909,742
Filed
2001-07-19
Granted
2004-06-15
Kind
B1