Granted Patent
Utility
US 6,757,632 · App. 10/175,685
Method and apparatus for testing integrated circuits using a synchronization signal so that all measurements are allotted a time slot of the same length
Inventors:
Giuseppe Tuttobene, Giuseppe Di Gregorio, Biagio Russo
Patented Case
View Patent ↗
Granted: Jun 29, 2004
Filed: Jun 20, 2002
Inventors
Giuseppe Tuttobene
Giuseppe Di Gregorio
Biagio Russo
Assignee (at issue)
STMICROELECTRONICS S.r.l.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.