Granted Patent
Utility
US 6,762,433 · App. 10/246,717
Semiconductor product wafer having vertically and horizontally arranged patterned areas including a limited number of test element group regions
Inventor:
Takahisa Yamaguchi
Patented Case
View Patent ↗
Granted: Jul 13, 2004
Filed: Sep 19, 2002
Inventor
Takahisa Yamaguchi
Assignee (at issue)
Kawasaki Microelectronics, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.