IP Library › Granted Patent US 6,841,415
Granted Patent B2
US 6,841,415 · App. 10/240,806 · Granted Jan 11, 2005

Flip chip mounting method which avoids void formation between a semiconductor chip and a substrate

Assignee: Namics Corporation
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Quick Facts
Patent No.
US 6,841,415
App. No.
10/240,806
Granted
Jan 11, 2005
Kind
B2
Abstract

The present invention is to provide a flip chip mounting method which does not cause void formation between a semiconductor chip and a substrate, and in the flip chip mounting method, the method comprising the steps of: (A) drying the substrate; and (B) at least one step of: (1) dispensing uncured sealant at least at a bump pressing portion on the surface of the substrate and/or the entire portion of the substrate where minute irregularities are present; and (2) performing a pressing and the curing of the underfill while maintaining the temperature conditions so that a temperature difference between the semiconductor chip and the substrate does not cause convection substantially in the uncured or curing underfill.

Claims (8)

1. A flip chip mounting method in which a semiconductor chip having a bump is pressed against a substrate so that the bump of the semiconductor chip faces the substrate or a semiconductor chip having no bump is pressed against a substrate having a bump on the surface and/or having a finely uneven surface due to a wiring pattern to seal up the gap between the semiconductor chip and the substrate using an underfill, the method comprising the steps of:

(A) drying the substrate; and

(B) dispensing uncured underfill at least at an entire portion of a bump pressing portion on the surface of the substrate and/or the entire portion of the substrate where minute irregularities are present; and

(C) performing a pressing and the curing of the underfill while maintaining the temperature conditions so that a temperature difference between the semiconductor chip and the substrate 200°K or lower.

2. The mounting method according to claim 1 , wherein the dispensed uncured underfill has a volatile component which volatiles at a pressing and curing temperature of 1.0% by weight or less.

3. The mounting method according to claim 1 , wherein the pressing is made by solder bonding.

4. The mounting method according to claim 2 , wherein the pressing is made by solder bonding.

5. The mounting method according to claim 1 , wherein the temperature difference between the semiconductor chip and the substrate is in the range of 50°K to 150°K.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2002
From: SUZUKI, OSAMU; YOSHII, HARUYUKI; SUZUKI, KENICHI
To: NAMICS CORPORATION
Reel/Frame 013547/0958 →
Priority Claims (1)
JP 2000-113081 · Apr 14, 2000 · national
Continuity (1)
Related Publication 20030059978A1 · Mar 27, 2003