Flip chip with novel power and ground arrangement

1. A method of forming a flip chip device, comprising:

providing a semiconductor die having a core area and a periphery area, the periphery area including an electrostatic discharge (ESD) structure, and the semiconductor die including at least one power conductor;

providing a substrate;

locating a first connection circuit within the semiconductor die core area to couple power between the substrate and the semiconductor die power conductor;

electrically coupling the ESD structure to the first connection circuit; and

electrically coupling the first connection circuit to the substrate via a conductive bump.

2. The method of claim 1 wherein the first connection circuit is a first under ball metallization (UBM).

3. The method of claim 2 further comprising:

locating a second UBM over the ESD structure; and

on the substrate, electrically coupling the first UBM to the second UBM.

4. The method of claim 2 further comprising:

locating a second UBM over the ESD structure; and

on the semiconductor die, electrically coupling the first UBM to the second UBM.

5. The method of claim 2 wherein the semiconductor die further comprises a redistribution layer; and

on the redistribution layer, electrically coupling the first UBM to the second UBM.

6. The method of claim 2 wherein the semiconductor die includes a metallization side and an opposite side, the metallization side being electrically coupled to the substrate;

thermally coupling the opposite side of the semiconductor die to a heat sink.

7. The method of claim 6 further comprising electrically coupling the substrate to a first surface of a package substrate via a plurality of bond wires.

8. The method of claim 7 further including adhesively bonding the opposite side of the semiconductor die to the heat sink.