IP Library Granted Patent US 6,911,373
Granted Patent B2
US 6,911,373 · App. 10/251,197 · Granted Jun 28, 2005

Ultra-high capacitance device based on nanostructures

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 6,911,373
App. No.
10/251,197
Granted
Jun 28, 2005
Kind
B2
Abstract

The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper conductor over the thin dielectric. The present invention further discloses a device including a substrate; a lower conductor located over the substrate; a conducting nanostructure located over the lower conductor; a thin dielectric located over the conducting nanostructure; and an upper conductor located over the thin dielectric.

Claims (10)

1. A method comprising:

providing a substrate;

forming an insulating nanostructure over said substrate, said insulating nanostructure being discontinuous;

forming a thin conductor over said insulating nanostructure, said thin conductor being conformal over said insulating nanostructure and said substrate;

forming a thin dielectric over said thin conductor; and

forming an upper conductor over said thin dielectric.

2. The method of claim 1 wherein said insulating nanostructure is formed by self-assembly.

3. The method of claim 1 wherein said thin dielectric is formed by Atomic Layer Deposition (ALD).

4. The method of claim 1 wherein said insulating nanostructure is formed by Chemical Vapor Deposition (CVD).

5. The method of claim 1 wherein said insulating nanostructure is formed selectively.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2002
From: KELLAR, SCOT A.; KIM, SARA E.
To: INTEL CORPORATION
Reel/Frame 013501/0136 →
Continuity (1)
Related Publication 20040058504A1 · Mar 25, 2004