Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
View Patent ↗The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.
1. A bipolar transistor comprising:
a base region comprising an intrinsic base region and surrounding raised extrinsic base regions;
a block emitter region comprising: at least a polysilicon emitter located atop and in contact with said intrinsic base region, and a vertical sidewall formed of an insulator and having a vertically-straight outer edge;
a first silicide layer locate on the raised extrinsic base region, said first silicide layer having an inner vertical edge that is self-aligned to a said vertical sidewall of the block emitter region;
a second suicide layer located on said polysilicon emitter and within the block emitter region, said second silicide layer having an outer edge that is vertically self-aligned to said inner vertical edge of the first silicide layer;
and a self-aligned emitter contact border having an inner vertical edge that is vertically aligned to said inner vertical edge of said first silicide layer,
wherein said inner vertical edge of said self-aligned emitter contact border is in contact with said vertically-straight outer edge of said vertical sidewall; and
wherein a top of said self-aligned emitter contact border substantially levels with a top of said vertical sidewall.
2. The bipolar transistor of claim 1 wherein the polysilicon emitter has an upper surface that is above an upper surface of the raised extrinsic base.
3. The bipolar transistor of claim 1 wherein the self-aligned emitter contact border is defined by a spacer.
4. The bipolar transistor of claim 3 wherein the spacer provides isolation between said base region and said polysilicon emitter of the block emitter region.
5. The bipolar transistor of claim 3 wherein the spacer is a wide spacer, a double spacer or an L-shaped spacer.
6. The bipolar transistor of claim 1 further comprising an emitter contact located directly atop the self-aligned emitter contact border and the block emitter region.
7. The bipolar transistor of claim 6 , wherein the emitter contact has a dimension that is larger than a dimension of the block emitter region.
8. The bipolar transistor of claim 1 further comprising a base contact located directly atop the raised extrinsic base region.
9. The bipolar transistor of claim 1 further comprising a silicided collector reach-through region located in a surface of a Si-containing substrate that underlies said transistor.
10. The bipolar transistor of claim 9 further comprising a collector contact atop said silicided collector reach-through region.