IP Library › Granted Patent US 7,064,645
Granted Patent B2
US 7,064,645 · App. 10/318,377 · Granted Jun 20, 2006

Electronic device

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,064,645
App. No.
10/318,377
Granted
Jun 20, 2006
Kind
B2
Abstract

The present invention realizes a miniaturized electronic device that is still capable of maintaining its high reliability even when miniaturized. To this end, the electronic device has an electronic circuit, comprising: a substrate with a circuit formation surface on which one part of the electronic circuit is formed; a polyimide layer that is formed on the circuit formation surface; and a spiral inductor constituting another part of the electronic circuit, which is formed into a pattern on the polyimide layer.

Claims (17)

1. An electronic device having an electronic circuit and an external connection terminal that is connected to said electronic circuit, said electronic device comprising:

a substrate having a circuit formation surface on which one portion of said electronic circuit corresponding to a high frequency active circuit is formed;

an isolating layer formed on said substrate;

a first insulating layer having a thickness of at least 9 μm formed on said circuit formation surface and said isolating layer;

internal wiring that comprises a first wiring portion for connecting said electronic circuit to said external connection terminal and a second wiring portion formed into a pattern in said first insulating layer and on said first insulating layer at a position where said isolating layer is formed; and

a second insulating layer formed on said internal wiring.

2. The electronic device as claimed in claim 1 , wherein said electronic circuit formed by said internal wiring is a spiral inductor.

3. The electronic device as claimed in claim 2 , comprising a plurality of said spiral inductors formed into a multi-layered structure.

4. The electronic device as claimed in claim 1 , further comprising a connecting position of said electronic circuit formed by said internal wiring to said electronic circuit formed on the circuit formation surface of said substrate, said connecting point being situated at the inner end of said internal wiring.

5. The electronic device as claimed in claim 1 , wherein the electronic circuit formed by said internal wiring is an antenna.

6. The electronic device as claimed in claim 1 , wherein:

an inductor and an antenna is formed as said electronic circuit formed by said internal wiring; and

said inductor and said antenna form a layered structure, the antenna being distanced further away from said circuit formation surface compared to the inductor.

7. The electronic device as claimed in claim 1 , further comprising a shield layer formed in between the electronic circuit formed by said internal wiring and the electronic circuit formed on said substrate.

8. The electronic device as claimed in claim 7 , wherein said shield layer has a mesh structure.

9. The electronic device as claimed in claim 1 , further comprising, on the substrate, an isolating layer for electrically separating said substrate from the electronic circuit formed by said internal wiring.

10. The electronic device as claimed in claim 9 , wherein said isolating layer comprises an insulating material that is filled into a microscopic trench formed on said substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2003
From: KOBAYASHI, KAZUHIKO; SAKODA, HIDEHARU; MATSUKI, HIROHISA; IGAWA, OSAMU; SATO, MITSUTAKA; AOKI, KOJU; SAKIMA, HIROYUKI
To: FUJITSU LIMITED
Reel/Frame 013858/0840 →
Priority Claims (2)
JP 2001-381325 · Dec 14, 2001 · national
JP 2002-307429 · Oct 22, 2002 · national
Continuity (1)
Related Publication 20030127704A1 · Jul 10, 2003