Granted Patent B1

US 7,065,136 · App. 09/716,501 · Granted Jun 20, 2006

Assignee: Freescale Semiconductor, Inc.

Abstract

Claims (80)

1. A receiver comprising:

a non-equalizing demodulator adapted to receive a modulated signal and adapted to demodulate the modulated signal to produce a first digital bit stream, wherein the modulated signal includes a plurality of frames, each frame having an amble portion;

an equalizing demodulator adapted to receive the modulated signal and adapted to equalize and demodulate the modulated signal to produce a second digital bit stream; and

an output control selector, coupled to the non-equalizing demodulator and the equalizing demodulator, adapted to selectively deliver a first one of the first digital bit stream and the second digital bit stream for at least a predetermined period of time before selectively delivering a second one of the first digital bit stream and the second digital bit stream responsive to a predetermined decision criterion, wherein the first one of the first digital bit stream and the second digital bit stream is different from the second one of the first digital bit stream and the second digital bit stream and wherein the predetermined decision criteria comprises a quality metric associated with the modulated signal, the quality metric further comprising a bit error rate associated with the modulated signal;

wherein the output control selector produces a first control signal to selectively enable and disable the non-equalizing demodulator to permit the non-equalizing demodulator to deliver and not deliver, respectively, the first digital bit stream; and

wherein the output control selector produces a second control signal to selectively enable and disable the equalizing demodulator to permit the equalizing demodulator to deliver and not deliver, respectively, the second digital bit stream; and

wherein the output control selector further comprises:

a bit error rate (BER) long term averager adapted to receive the amble portion of each frame, adapted to determine bit error rate of the amble portion of each frame, and adapted to average the bit error rate of the amble portion of each frame over time to determine a long term average BER associated with the modulated signal; and

a switch adapted to receive the first digital bit stream and the second digital bit stream and adapted to selectively deliver one of the first digital bit stream and the second digital bit stream responsive to a third control signal.

2. The receiver of claim 1 wherein the at least a predetermined period of time further comprises a predetermined amount of signal information representative of a timing of a signal received by the receiver.

3. The receiver of claim 2 wherein the predetermined amount of signal information further comprises a predetermined number of frames of the modulated signal.

4. The receiver of claim 2 wherein the predetermined amount of signal information further comprises a predetermined number of bits of at least one of the first digital bit stream and the second digital bit stream.

5. The receiver of claim 1 wherein the predetermined decision criterion further comprises a quality metric associated with a signal processing capacity available for the receiver.

6. The receiver of claim 1 wherein the predetermined decision criterion further comprises a quality metric associated with a power supply capacity available for the receiver.

7. The receiver of claim 1 wherein the predetermined decision criterion further comprises a quality metric associated with at least one of the first digital bit stream and the second digital bit stream.

8. The receiver of claim 1 , wherein the amble portion comprises a preamble.

9. The receiver of claim 1 , wherein the amble portion comprises a midamble.

10. The receiver of claim 1 , wherein the output control selector selectively delivers the first digital bit stream for the at least the predetermined period of time responsive to the long term average BER being below a first threshold.

11. The receiver of claim 10 , wherein the output control selector selectively delivers the second digital bit stream for the at least the predetermined period of time responsive to the long term average BER being above a second threshold that is greater than the first threshold.

12. The receiver of claim 11 :

wherein a hysteresis region exists between the first threshold and the second threshold,

wherein the output control selector continues to selectively deliver the first digital bit stream responsive to the long term average BER passing from below the first threshold into the hysteresis region, and

wherein the output control selector continues to selectively deliver the second digital bit stream responsive to the long term average BER passing from above the second threshold into the hysteresis region.

13. The receiver of claim 11 :

wherein a dual processing region exists between the first threshold and the second threshold, and

wherein both the equalizing demodulator and the non-equalizing demodulator operate responsive to the long term average BER being in the dual processing region.

14. The receiver of claim 11 , wherein each of the frames includes a multiplicity of subsections, and further comprising:

a subsection processor that processes one of the subsections responsive to the long term average BER being between the first threshold and the second threshold.

15. The receiver of claim 14 :

wherein the subsection processor determines a subsection quality metric of the one subsection,

wherein the output control selector selectively delivers the first digital bit stream when the subsection quality metric of the one subsection is above a third threshold and below the second threshold for the at least the predetermined period of time, and

wherein and the output control selector selectively delivers the second digital bit stream when the subsection quality metric of the one subsection is below the third threshold and above the first threshold for the at least the predetermined period of time.

16. A receiver comprising:

a non-equalizing demodulator adapted to receive a modulated signal and adapted to demodulate the modulated signal to produce a first digital bit stream, wherein the modulated signal includes a plurality of frames, each frame having an amble portion,

an equalizing demodulator adapted to receive the modulated signal and adapted to equalize and demodulate the modulated signal to produce a second digital bit stream; and

an output control selector, coupled to the non-equalizing demodulator and the equalizing demodulator and adapted to receive the modulated signal, including:

a bit error rate (BER) long term averager adapted to receive the amble portion of each frame of the modulated signal, adapted to determine a bit error rate of the amble portion of each frame, and adapted to average the bit error rate of the amble portion of each frame over time to determine a long term average bit error rate associated with the modulated signal,

wherein the output control selector is adapted to selectively enabling a first one of the non-equalizing demodulator and the equalizing demodulator and selectively disabling a second one of the non-equalizing demodulator and the equalizing demodulator to selectively deliver a first one of the first digital bit stream and the second digital bit stream for at least a predetermined period of time, corresponding to a predetermined number of frames of the modulated signal, before selectively disabling the first one of the non-equalizing demodulator and the equalizing demodulator and selectively enabling the second one of the non-equalizing demodulator and the equalizing demodulator to selectively delivering a second one of the first digital bit stream and the second digital bit stream responsive to the long term average bit error rate, wherein the first one of the non-equalizing demodulator and the equalizing demodulator is different from the second one of the non-equalizing demodulator and the equalizing demodulator, and wherein the first one of the first digital bit stream and the second digital bit stream is different from the second one of the first digital bit stream and the second digital bit stream; and

wherein the output control selector selectively delivers the first digital bit stream for the at least the predetermined period of time responsive to the long term average BER being below a first threshold and selectively delivers the second digital bit stream for the at least the predetermined period of time responsive to the long term average BER being above a second threshold that is greater than the first threshold.

17. The receiver of claim 16 , wherein the amble portion comprises a preamble.

18. The receiver of claim 16 , wherein the amble portion comprises a midamble.

19. The receiver of claim 16 :

wherein a hysteresis region exists between the first threshold and the second threshold,

wherein the output control selector continues to selectively deliver the first digital bit stream responsive to the long term average BER passing from below the first threshold into the hysteresis region, and

wherein the output control selector continues to selectively deliver the second digital bit stream responsive to the long term average BER passing from above the second threshold into the hysteresis region.

20. The receiver of claim 16 :

wherein a dual processing region exists between the first threshold and the second threshold, and

wherein both the equalizing demodulator and the non-equalizing demodulator operate responsive to the long term average BER being in the dual processing region.

21. The receiver of claim 16 , wherein each of the frames includes a multiplicity of subsections, and further comprising:

a subsection processor that processes one of the subsections responsive to the long term average BER being between the first threshold and the second threshold.

22. The receiver of claim 21 :

wherein the subsection processor determines a subsection quality metric of the one subsection,

wherein the output control selector selectively delivers the first digital bit stream when the subsection quality metric of the one subsection is above a third threshold and below the second threshold for the at least the predetermined period of time, and

wherein and the output control selector selectively delivers the second digital bit stream when the subsection quality metric of the one subsection is below the third threshold and above the first threshold for the at least the predetermined period of time.

23. A receiver comprising:

a non-equalizing demodulator adapted to receive a modulated signal and adapted to demodulate the modulated signal to produce a first digital bit stream, wherein the modulated signal includes a plurality of frames, each frame having an amble portion;

an equalizing demodulator adapted to receive the modulated signal and adapted to equalize and demodulate and the modulated signal to produce a second digital bit stream; and

an output control selector including:

a switch adapted to receive the first digital bit stream and the second digital bit stream and adapted to selectively deliver a first one of the first digital bit stream and the second digital bit stream for at least a predetermined period of time before selectively delivering a second one of the first digital bit stream and the second digital bit stream responsive to a signal quality metric associated with at least one of the first digital bit stream and the second digital bit stream, wherein the first one of the first digital bit stream and the second digital bit stream is different from the second one of the first digital bit stream and the second digital bit stream, wherein the output control selector selectively delivers the first digital bit stream for the at least the predetermined period of time responsive to the signal quality metric being below a first threshold and selectively delivers the second digital bit stream for the at least the predetermined period of time responsive to the signal quality metric being above a second threshold that is greater than the first threshold, the signal quality metric further comprising a bit error rate associated with the modulated signal; and

a bit error rate (BER) long term averager adapted to receive the amble portion of each frame, adapted to determine bit error rate of the amble portion of each frame, and adapted to average the bit error rate of the amble portion of each frame over time to determine a long term average BER associated with the modulated signal.

24. The receiver of claim 23 :

wherein a hysteresis region exists between the first threshold and the second threshold,

wherein the output control selector continues to selectively deliver the first digital bit stream responsive to the signal quality metric passing from below the first threshold into the hysteresis region, and

wherein the output control selector continues to selectively deliver the second digital bit stream responsive to the signal quality metric passing from above the second threshold into the hysteresis region.

25. The receiver of claim 23 :

wherein a dual processing region exists between the first threshold and the second threshold, and

wherein both the equalizing demodulator and the non-equalizing demodulator operate responsive to the signal quality metric being in the dual processing region.

26. The receiver of claim 23 , wherein each of the frames includes a multiplicity of subsections, and further comprising

a subsection processor that processes one of the subsections responsive to the signal quality metric being between the first threshold and the second threshold.

27. The receiver of claim 26 :

wherein the subsection processor determines a subsection quality metric of the one subsection,

wherein the output control selector selectively delivers the first digital bit stream when the subsection quality metric of the one subsection is above a third threshold and below the second threshold for the at least the predetermined period of time, and

wherein and the output control selector selectively delivers the second digital bit stream when the subsection quality metric of the one subsection is below the third threshold and above the first threshold for the at least the predetermined period of time.

28. A method for operating a receiver comprising the steps of:

demodulating a modulated signal to produce a first digital bit stream, wherein the modulated signal includes a plurality of frames, and wherein each frame has an amble portion;

equalizing and demodulating the modulated signal to produce a second digital bit stream;

receiving the amble portion of each frame of the modulated signal;

determining a bit error rate of the amble portion of each frame;

averaging the bit error rate of the amble portion of each frame over time to determine a long term average bit error rate associated with the modulated signal; and

selectively enabling a first one of the non-equalizing demodulator and the equalizing demodulator and selectively disabling a second one of the non-equalizing demodulator and the equalizing demodulator to selectively deliver a first one of the first digital bit stream and the second digital bit stream for at least a predetermined period of time, corresponding to a predetermined number of frames of the modulated signal, before selectively disabling the first one of the non-equalizing demodulator and the equalizing demodulator and selectively enabling the second one of the non-equalizing demodulator and the equalizing demodulator to selectively delivering a second one of the first digital bit stream and the second digital bit stream responsive to the long term average bit error rate such that the first digital bit stream is delivered for the at least predetermined period of time responsive to the long term average bit error rate being below a first threshold and the second digital bit stream is delivered for the at least predetermined period of time responsive to the lone term average bit error rate being above a second threshold that is greater than the first threshold, wherein the first one of the nonequalizing demodulator and the equalizing demodulator is different from the second one of the non-equalizing demodulator and the equalizing demodulator, and wherein the first one of the first digital bit stream and the second digital bit stream is different from the second one of the first digital bit stream and the second digital bit stream.

Assignments (20)

Continuity (1)