IP Library › Granted Patent US 7,122,864
Granted Patent B2
US 7,122,864 · App. 10/439,896 · Granted Oct 17, 2006

Semiconductor substrate having a partial SOI structure, method of manufacturing the same, a semiconductor device having a partial SOI structure, and method of manufacturing the same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 7,122,864
App. No.
10/439,896
Granted
Oct 17, 2006
Kind
B2
Abstract

A semiconductor substrate is disclosed which comprises a first single crystal silicon layer, an insulator formed to partially cover one main surface of the first single crystal silicon layer, a second single crystal silicon layer formed to cover a region of the first single crystal silicon layer which is not covered with the insulator, and to cover an edge portion of the insulator adjacent to the region, and a non-single crystal silicon layer formed on the insulator, the interface between the non-single crystal silicon layer and the second single crystal silicon layer being positioned on the insulator.

Claims (17)

1. A semiconductor substrate having a non-insulator region and an insulator region structure, comprising:

a first single crystal silicon layer formed in the non-insulator region, including a first surface;

a second single crystal silicon layer formed in the insulator region, including a second surface being flush with the first surface;

an insulator formed under the second single crystal silicon layer; and

a non-single crystal silicon layer formed only under the insulator, an end of an interface between the insulator and the non-single crystal silicon layer by a side of the non-insulator region being separated from an end of the insulator by the side of the non-insulator region with a predetermined distance.

2. A semiconductor substrate according to claim 1 , further comprising:

a third single crystal silicon layer formed under the insulator so as to cover the non-single crystal silicon layer.

3. A semiconductor substrate according to claim 1 , wherein the non-single crystal silicon layer is a polycrystalline silicon layer.

4. A semiconductor device having a partial silicon on insulator structure, comprising:

a semiconductor substrate including a non-insulator region and an insulator region;

the non-insulator region including a first single crystal silicon layer having a first surface;

the insulator region including a second single crystal layer having a second surface, an insulator formed under the second single crystal layer and a non-single crystal silicon layer formed only under the insulator;

a first semiconductor element formed on the first surface, including a first source/drain and a first gate; and

a second semiconductor element formed on the second surface, including a second source/drain and a second gate.

5. A semiconductor device according to claim 4 , wherein an end of an interface between the insulator and the non-single crystal silicon layer by a side of the non-insulator region is separated from an end of the insulator by the side of the non-insulator region with a predetermined distance.

6. A semiconductor device according to claim 4 , wherein the first surface is flush with the second surface.

7. A semiconductor device according to claim 4 , wherein the first semiconductor element includes a trench capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2003
From: NAGANO, HAJIME; MIYANO, KIYOTAKA; MIZUSHIMA, ICHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 014514/0847 →
Priority Claims (1)
JP 2003-072218 · Mar 17, 2003 · national
Continuity (1)
Related Publication 20040183131A1 · Sep 23, 2004