IP Library › Granted Patent US 7,123,072
Granted Patent B2
US 7,123,072 · App. 10/128,663 · Granted Oct 17, 2006

High-accuracy capacitor digital-to-analog converter

Assignee: Himax Opto-Electronics Corp.
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Quick Facts
Patent No.
US 7,123,072
App. No.
10/128,663
Granted
Oct 17, 2006
Kind
B2
Abstract

A capacitor digital-to-analog converter for N-bit digital-to-analog conversion comprises a converter capacitor network comprising 2 N capacitors and 2 N +1 MOS switches and an output buffer. The MOS switches are connected in a series chain at their respective source/drain, and each of the capacitors has a first electrode connected to a corresponding joining node between two consecutive MOS switches in the series chain and a second electrode connected together to a common node. The output buffer comprises a differential amplifier and an output amplifier, the differential amplifier has 2 N discrete inputs each connected to a corresponding one of the first electrodes of the capacitors in the converter capacitor network.

Claims (37)

1. A capacitor digital-to-analog converter for converting an N-bit digital signal into an analog signal, said converter comprising:

a converter capacitor network comprising 2 N capacitors and 2 N +1 MOS switches, said MOS switches being connected in a series chain at their respective source/drain, and each of said capacitors has a first electrode connected to a corresponding joining node between two consecutive MOS switches in said series chain and a second electrode connected together to a common node; and

an output buffer comprising a differential amplifier and an output amplifier, output of said differential amplifier being connected to said output amplifier, said differential amplifier having 2 N discrete inputs each connected to a corresponding one of said first electrodes of said capacitors in said converter capacitor network for converting said N-bit digital signal in said capacitor network into a voltage signal and sending to said output amplifier for amplification and output as converted analog signal.

2. The capacitor digital-to-analog converter of claim 1 , wherein said differential amplifier of said output buffer further comprises a current mirror and a differential pair of MOS switch devices.

3. The capacitor digital-to-analog converter of claim 2 , wherein said differential pair of MOS switch devices further comprises a first MOS switch device at one differential branch and a plurality of 2 N second MOS switch devices of the same polarity at the other differential branch.

4. The capacitor digital-to-analog converter of claim 3 , wherein said 2 N second MOS switch devices have an effective total physical device dimension the same as the physical device dimension of said first MOS switch device.

5. The capacitor digital-to-analog converter of claim 4 , wherein said current mirror further comprises a first and a second MOS switch device of a polarity opposite to the polarity of said first MOS switch device and said 2 N second MOS switch devices of said differential pair.

6. The capacitor digital-to-analog converter of claim 5 , wherein said first and second MOS switch devices of said current mirror are PMOS switch devices, and said first and second MOS switch devices of said differential pair are NMOS switch devices.

7. The capacitor digital-to-analog converter of claim 6 , wherein

source terminals of said first and second PMOS switch devices of said current mirror are connected together and to the power source of the system of said converter; and

source terminals of said first and second NMOS switch devices of said differential pair are connected together and to ground of the system of said converter by a third NMOS switch device.

8. The capacitor digital-to-analog converter of claim 6 , wherein

drain terminal of said first PMOS switch device of said current mirror is connected to drain terminal of said first NMOS switch device said differential pair; and

drain terminal of said second PMOS switch device of said current mirror is connected to the drain terminals of said second NMOS switch devices of said differential pair.

9. The capacitor digital-to-analog converter of claim 6 , wherein

each of the gate terminal of said second NMOS switch devices is connected to a corresponding one of said 2 N discrete inputs; and

gate terminal of said first NMOS switch device receives feedback from the output of said buffer.

10. The capacitor digital-to-analog converter of claim 6 , wherein

gate terminals of said first and second PMOS switch devices of said current mirror are connected together by a third PMOS switch device;

gate and drain terminals of said second PMOS switch device are connected together;

gate and drain terminals of said first PMOS switch device are connected together by a fourth PMOS switch device; and

gate terminal of said first NMOS switch device of said differential pair is connected to said ground by a fifth PMOS device.

11. The capacitor digital-to-analog converter of claim 5 , wherein said first and second MOS switch devices of said current mirror are NMOS switch devices, and said first and second MOS switch devices of said differential pair are PMOS switch devices.

12. The capacitor digital-to-analog converter of claim 11 , wherein

source terminals of said first and second NMOS switch devices of said current mirror are connected together and to the ground of the system of said converter; and

source terminals of said first and second PMOS switch devices of said differential pair are connected together and to power source of the system of said converter by a third NMOS switch device.

13. The capacitor digital-to-analog converter of claim 11 , wherein

source terminal of said first NMOS switch device of said current mirror is connected to source terminal of said first PMOS switch device of said differential pair; and

source terminal of said second NMOS switch device of said current mirror is connected to the source terminals of said second PMOS switch devices of said differential pair.

14. The capacitor digital-to-analog converter of claim 11 , wherein

each of the gate terminal of said second PMOS switch devices is connected to a corresponding one of said 2 N discrete inputs; and

gate terminal of said first PMOS switch device receives feedback from the output of said buffer.

15. The capacitor digital-to-analog converter of claim 11 , wherein

gate terminals of said first and second NMOS switch devices of said current mirror are connected together by a third NMOS switch device;

gate and drain terminals of said second NMOS switch device are connected together;

gate and drain terminals of said first NMOS switch device are connected together by a fourth NMOS switch device; and

gate terminal of said first PMOS switch device of said differential pair is connected to said ground by a fifth NMOS device.

Assignments (3)
CHANGE OF NAME Recorded May 8, 2007
From: HIMAX TECHNOLOGIES, INC.
To: HIMAX TECHNOLOGIES LIMITED
Reel/Frame 019262/0796 →
CHANGE OF NAME Recorded Jul 17, 2002
From: BU, LINKAI; HSIAO, CHUAN-CHENG; HUNG, KUN-CHENG; CHEN, CHIEN-PIN
To: HIMAX TECHNOLOGIES, INC.
Reel/Frame 013107/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2002
From: BU, LINKAI; HSIAO, CHUAN-CHENG; HUNG, KUN-CHENG; CHEN, CHIEN-PIN
To: HIMAX OPTO-ELECTRONICS CORP.
Reel/Frame 012856/0889 →
Priority Claims (1)
TW 90109951 A · Apr 25, 2001 · national
Continuity (1)
Related Publication 20020158786A1 · Oct 31, 2002