On-chip resistance monitor and diagnoses for electrical fuses

1. A resistance monitoring system for electrical fuses, the system comprising:

at least one non-regenerative sense amplifier;

at least one fuse module having at least one fuse cell coupled to a first terminal of the sense amplifier; and

a reference resistor coupled to a second terminal of the sense amplifier,

wherein a source voltage node between the fuse module and the sense amplifier is monitored to reflect a resistance of the fuse cell by controlling a voltage at the source voltage node in a range between about 2.5 and 3.0 volts during a programming process, and clamping the same to less than 1 volt during a reading process.

2. The system of claim 1 , wherein the fuse cell comprises a select device coupled with an electrical fuse.

3. The system of claim 1 , wherein the fuse module further includes a plurality of fuse cells and a decoder for selecting a predetermined fuse cell.

4. The system of claim 1 , wherein the fuse module further includes a plurality of banks of fuse cells.

5. The system of claim 4 , wherein the sense amplifier is shared by the banks of fuse cells.

6. The system of claim 4 , wherein each bank is coupled to a separate sense amplifier.

7. The system of claim 1 , wherein the sense amplifier further includes a predetermined transistor coupled in series with the reference resistor to form a voltage divider circuit with the reference resistor connected to the source voltage node of the fuse module.

8. The system of claim 1 , wherein the sense amplifier further includes a bias circuit having the reference resistor coupled in series with at least one MOS transistor, wherein an output in generated based on a difference in resistance between the fuse module and the reference resistor.

9. The system of claim 1 , further comprising a voltage supply circuit coupled to one or more peripheral circuits of the fuse module for providing a higher voltage range during a program process and a low but operating voltage range during a read process.

10. A resistance monitoring system for electrical fuses, the system comprising:

a fuse module having a plurality banks of fuse cells;

at least one non-regenerative sense amplifier coupled with the fuse module;

a reference resistor coupled to the sense amplifier; and

a bank select control for selecting each bank of fuse cells to be coupled through a source voltage node to the sense amplifier, wherein the source voltage node is monitored to reflect a resistance of the fuse cell by controlling a voltage at the source voltage node in a range between about 2.5 and 3.0 volts during a programming process, and clamping the same to less than 1 volt during a reading process.

11. The system of claim 10 , wherein the fuse module further includes a decoder for selecting a predetermined fuse cell.

12. The system of claim 10 , wherein each bank is coupled to a separate sense amplifier.

13. The system of claim 10 , wherein the sense amplifier further includes a voltage divider circuit, including the reference resistor, coupled with the fuse module through the source voltage node.

14. The system of claim 10 , wherein the sense amplifier further includes a bias circuit having the reference resistor coupled in series with at least one MOS transistor, wherein an output is generated based on a difference in resistance between the fuse module and the reference resistor.

15. The system of claim 10 , further comprising a voltage supply circuit coupled to one or more peripheral circuits of the fuse module for providing an operating voltage during a read process.

16. A resistance monitoring system for electrical fuses, the system comprising:

a fuse module having a plurality banks of fuse cells;

at least one non-regenerative sense amplifier coupled with each bank of fuse cells;

a reference resistor coupled to the sense amplifier;

a bank select control for selecting each bank of fuse cells to be coupled through a source voltage node to the sense amplifier, wherein the source voltage node is monitored to reflect a resistance of the fuse cell; and

a voltage supply circuit coupled to one or more select devices of the fuse cell for providing the source voltage node with a first voltage range for operating the fuse module during a program process and a second voltage range lower than the first voltage range during a read process,

wherein the second voltage range is below 1 volt during the read process and the first voltage range between about 2.5 and 3.0 volts during the program process.

17. The system of claim 16 , wherein the sense amplifier further includes a voltage divider circuit with the source voltage node being a mid point between the reference resistor and the fuse module.

18. The system of claim 16 , wherein the sense amplifier further includes a bias circuit having the reference resistor coupled in series with at least one MOS transistor, wherein an output is generated based on a difference in resistance between the fuse module and the reference resistor.