IP Library › Granted Patent US 7,155,717
Granted Patent B2
US 7,155,717 · App. 09/771,374 · Granted Dec 26, 2006

Apportioning a shared computer resource

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,155,717
App. No.
09/771,374
Granted
Dec 26, 2006
Kind
B2
Abstract

Disclosed a processes and an apparatus which relates to an improved technique for sharing a computer resource.

Claims (27)

1. A method, comprising:

assigning an access value and a priority value to each of a plurality of computer processes which request access to a shared computer resource, where the priority value can be high priority or low priority;

during an first access cycle, first providing access to processes whose priority value represents high priority and whose access value represents that access should still be granted during the access cycle, and after granting each access, adjusting an access value associated with said each access to indicate that additional access has been granted;

determining, during said first access cycle, that all high priority requests have access values that indicate that no additional access should be granted;

responsive to said determining, in said first access cycle, providing access to low priority requests whose access values represent that access should be granted, and adjusting access values after granting the access; and

after determining that both the high priority requests and low priority requests each have access values that represent no further access should be granted in said first access cycle, starting a new access cycle with new access values and priority values.

2. The method according to claim 1 wherein at least one of the computer processes is an isochronous process.

3. The method according to claim 1 wherein at least one of the computer processes is an asynchronous process.

4. An article comprising a computer readable media which stores executable instructions for controlling access to a shared computer resource by at least two computer processes, the instructions, when executed, causing the computer to:

assign an access value and a priority value to each of a plurality of computer processes which request access to a shared computer resource, where the priority value can be high priority or low priority;

during a first access cycle, first provide access to processes whose priority value represents high priority and whose access value represents that access should still be granted during the access cycle, and after granting each access, adjust an access value associated with said access to indicate that additional access has been granted;

determine, during said first access cycle, that all high priority requests have access values that indicate that no additional access should be granted;

responsive to said determining, in said first access cycle, provide access to low priority requests whose access values indicate that access should be granted, and adjust access values after granting the access; and

after determining that both the high priority requests and low priority requests each have access values that represent no further access should be granted in said first access cycle, start a new access cycle with new access values and priority values.

5. The article according to claim 4 wherein at least one of the computer processes is an isochronous process.

6. The article according to claim 4 wherein at least one of the computer processes is an asynchronous process.

7. An apparatus, comprising:

a controller device, having a first port for connecting to a shared resource, and at least one second port for connecting to a plurality of different processes which are requesting access to the shared resource,

a memory operating to store access values,

said controller operating to:

assign an access value and a priority value to each of a plurality of computer processes which request access to the shared resource, where the priority value can be high priority or low priority, and store said values in said memory, during a first access cycle, first controlling said processes to provide access to processes whose priority value represents high priority and whose access value represents that access should still be granted during the access cycle, and after granting each access, adjusting an access value associated with said access to indicate that additional access has been granted, determining, during said first access cycle, that all high priority requests have access values that indicate that no additional access should be granted, responsive to said determining, in said first access cycle, providing access to low priority requests whose access values represent that access should be granted, and adjusting access values after granting the access; and

after determining that both the high priority requests and low priority requests each have access values that represent no further access should be granted in said first access cycle, starting a new access cycle with new access values and priority values.

8. The apparatus according to claim 7 wherein at least one of the computer processes is an isochronous process.

9. The apparatus according to claim 7 wherein at least one of the computer processes is an asynchronous process.

10. The apparatus according to claim 7 wherein:

the shared resource comprises a shared memory bank; and

the controller device comprises a memory controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2001
From: MEHTA, KALPESH D.
To: INTEL CORPORATION
Reel/Frame 011896/0511 →
Continuity (1)
Related Publication 20020143843A1 · Oct 3, 2002