IP Library Granted Patent US 7,184,344
Granted Patent B2
US 7,184,344 · App. 11/062,826 · Granted Feb 27, 2007

Semiconductor device comprising a differential sense amplifier, a write column selection switch and a read column selection switch

Assignee: Matsushita Electric Industrial Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,184,344
App. No.
11/062,826
Granted
Feb 27, 2007
Kind
B2
Abstract

A semiconductor device includes a differential sense amplifier connected to a bit line, and a data transfer circuit including a column selection switch for turning ON/OFF the connection between a data line and the bit line. The semiconductor device incorporates one of the following features: the on-state resistance of the column selection switch being higher than that of a transistor array of the differential sense amplifier; separate provision of two column selection switches, one for read operation and the other for write operation; provision of a bit line additional capacitance and a connection control switch therefor; and provision of a data line dividing switch.

Claims (9)

1. A semiconductor device, comprising:

a differential sense amplifier connected to a bit line; and

a data transfer circuit including a column selection switch for turning ON/OFF connection between a data line and the bit line, wherein:

the differential sense amplifier includes a power supply and a transistor array of at least one MOS transistor connecting the power supply with the bit line; and

an on-state resistance of the column selection switch is higher than that of the transistor array.

2. The semiconductor device of claim 1 , wherein:

the bit line includes a first bit line and a second bit line that go high and low, respectively, when the differential sense amplifier is activated in a read operation;

the differential sense amplifier includes a P-channel MOS transistor connecting the power supply with the second bit line; and

a potential of the first bit line is higher than a threshold of the P-channel MOS transistor.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2020
From: PANNOVA SEMIC, LLC
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 053755/0859 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Sep 19, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 033777/0873 →
Priority Claims (1)
JP 2002-263856 · Sep 10, 2002 · national
Continuity (2)
Division 1064474400 · Aug 21, 2003
Related Publication 20050141307A1 · Jun 30, 2005