Semiconductor device with inductive component and method of making
View Patent ↗An integrated circuit ( 10 ) includes a semiconductor substrate ( 11 ) that has a top surface ( 32 ) for forming a dielectric region ( 14 ) with a trench ( 40 ) and one or more adjacent cavities ( 16 ). A conductive material such as copper is disposed within the trench to produce an inductor ( 50 ). A top surface ( 49 ) of the inductor is substantially coplanar with an interconnect surface ( 31 ) of the semiconductor substrate, which facilitates connecting to the inductor with standard integrated circuit metallization ( 57 ).
1. A method of making an integrated circuit, comprising the steps of:
forming a dielectric region in a semiconductor substrate to have a cavity and a trench; and
disposing a conductive material within the trench to produce an inductance, including applying a plating voltage to a bottom surface of the semiconductor substrate, coupling the plating voltage through the semiconductor substrate to a bottom surface of the trench, and plating the conductive material within the trench to form an inductor.
2. The method of claim 1 , wherein the step of forming includes the step of forming the dielectric region at a top surface of the semiconductor substrate.
3. The method of claim 1 , wherein the step of plating includes the step of electroplating copper within the trench.
4. The method of claim 1 , wherein the step of plating includes the step of depositing a barrier material to form a barrier layer at the bottom surface of the trench.
5. The method of claim 4 , wherein the step of depositing includes the step of depositing a metal selected from the group consisting of platinum, titanium and cobalt along the bottom surface of the trench.
6. The method of claim 5 , wherein the step of depositing a metal includes the step of forming the barrier layer to include a metal silicide.
7. The method of claim 1 , further comprising the step of etching a bottom surface of the semiconductor substrate to form a recessed region underlying the dielectric region.
8. The method of claim 7 , wherein the step of etching includes the step of removing material from the bottom surface of the semiconductor substrate extending to a bottom surface of the trench.
9. The method of claim 1 , wherein the step of disposing includes the step of disposing the conductive material within the trench to a thickness of at least five micrometers.