Sub-1V bandgap reference circuit
A bandgap reference circuit is disclosed operating under a predetermined low voltage source. The circuit has a first circuit with a first differential amplifier for generating a first current, a second circuit with a second differential amplifier for generating a second current, and a bandgap reference voltage output module for combining the first current and the second current to output a bandgap reference voltage, wherein the first circuit and the second circuit complement each other for offsetting variations of the bandgap reference voltage due to temperature changes.
1. A bandgap reference circuit operating under a voltage source comprising:
a first circuit with a first differential amplifier for generating a first current;
a second circuit with a second differential amplifier for generating a second current, wherein the first circuit and the second circuit comprise BiCMOS transistors;
a start-up circuit for providing an initial current to the first circuit, wherein the start-up circuit further comprises a NMOS transistor and a first PMOS transistor coupled in series with a gate of a second PMOS transistor coupled to drains of the first PMOS transistor and the NMOS transistor; and
a bandgap reference voltage output module for combining the first current and the second current to output a bandgap reference voltage,
wherein the first current increases while the second current decreases with the increase of temperature, thereby the first circuit and the second circuit complement each other for offsetting variations of the bandgap reference voltage due to temperature changes.
2. The circuit of claim 1 , wherein the first circuit is a proportional-to-absolute-temperature circuit.
3. The circuit of claim 2 , wherein the proportional-to-absolute-temperature circuit comprises:
a first and a second PNP bipolar transistors, whose bases and collectors are coupled with an electrical ground;
a first resistor coupled to the emitter of the first PNP bipolar transistor at its first end;
two PMOS transistors, whose drains are respectively coupled with the negative and the positive input terminals of the first differential amplifier, whose sources are coupled with the voltage source, and whose gates are coupled together at an output terminal of the first differential amplifier,
wherein the positive input terminal of the first differential amplifier is coupled with the emitter of the second PNP bipolar transistor and the negative input terminal is coupled with the first resistor at its second end.
4. The circuit of claim 3 , wherein the second circuit is a complementary-to-absolute-temperature circuit which further comprises:
a second resistor with its first end coupled to ground and its second end coupled to a negative input terminal of the second differential amplifier;
a PMOS transistor, whose drain is coupled to the negative input terminal of the second differential amplifier and whose source is coupled with the voltage source, and whose gate is coupled with an output terminal of the second differential amplifier,
wherein the positive input terminal and the output terminal of the second differential amplifier are respectively coupled with the positive input terminal of the first differential amplifier and the gate of the PMOS transistor coupled to the positive input terminal of the first differential amplifier.
5. The circuit of claim 3 wherein the second circuit is a complementary-to-absolute-temperature circuit which further comprises:
a second resistor with its first end coupled to ground and its second end coupled to a negative input terminal of the second differential amplifier;
a PMOS transistor, whose drain is coupled to the negative input terminal of the second differential amplifier and whose source is coupled with the voltage source, and whose gate is coupled with an output terminal of the second differential amplifier,
wherein the positive input terminal and the output terminal of the second differential amplifier are respectively coupled with the negative input terminal of the first differential amplifier and a gate of a PMOS transistor of the bandgap reference output module that mirrors the first current.
6. The circuit of claim 1 , wherein the second circuit is a complementary-to-absolute-temperature circuit.
7. The circuit of claim 6 , wherein the complementary-to-absolute-temperature circuit comprises:
a PNP bipolar transistor, whose base and collector are coupled with an electrical ground;
a resistor with its first end coupled to ground;
two PMOS transistors, whose drains are respectively coupled with the negative and the positive input terminals of the second differential amplifier, whose sources are coupled with the voltage source, and whose gates are coupled together at an output terminal of the second differential amplifier,
wherein the positive input terminal of the second differential amplifier is coupled with the emitter of the PNP bipolar transistor and the negative input terminal is coupled with the resistor at its second end.
8. The circuit of claim 1 , wherein the voltage source is under 1 volt.
9. A bandgap reference circuit comprising:
a first circuit with a first differential amplifier for generating a first current;
a second circuit with a second differential amplifier for generating a second current, wherein the first circuit is a proportional-to-absolute-temperature circuit, which further comprises:
a first and a second PNP bipolar transistors, whose bases and collectors are coupled with an electrical ground;
a first resistor coupled to the emitter of the first PNP bipolar transistor at its first end;
two PMOS transistors, whose drains are respectively coupled with the negative and the positive input terminals of the first differential amplifier, whose sources are coupled with the voltage source, and whose gates are coupled together at an output terminal of the first differential amplifier,
wherein the positive input terminal of the first differential amplifier is coupled with the emitter of the second PNP bipolar transistor and the negative input terminal is coupled with the first resistor at its second end; and
a bandgap reference voltage output module for combining the first current and the second current to output a bandgap reference voltage,
wherein the first current increases while the second current decreases with the increase of temperature, thereby the first circuit and the second circuit complement each other for offsetting variations of the bandgap reference voltage due to temperature changes, and
wherein the bandgap reference voltage output module is in a current mirror configuration with the first and second circuits respectively for combining the first current and the second current.
10. The circuit of claim 9 , wherein the second circuit is a complementary-to-absolute-temperature circuit which further comprises:
a PMOS transistor; and
a second resistor with its first end coupled to ground and its second end coupled to a negative input terminal of the second differential amplifier,
wherein the drain of the PMOS transistor is coupled to the negative input terminal of the second differential amplifier, the source is coupled with the voltage source, and the gate is coupled with an output terminal of the second differential amplifier, and
wherein the positive input terminal and the output terminal of the second differential amplifier are respectively coupled with the positive input terminal of the first differential amplifier and the gate of the PMOS transistor coupled to the positive input terminal of the first differential amplifier.
11. The circuit of claim 9 wherein the second circuit is a complementary-to-absolute-temperature circuit which further comprises:
a PMOS transistor; and
a second resistor with its first end coupled to ground and its second end coupled to a negative input terminal of the second differential amplifier,
wherein a drain of the PMOS transistor is coupled to the negative input terminal of the second differential amplifier, a source is coupled with the voltage source, and a gate is coupled with an output terminal of the second differential amplifier, and
wherein the positive input terminal and the output terminal of the second differential amplifier are respectively coupled with the negative input terminal of the first differential amplifier and a gate of a PMOS transistor of the bandgap reference output module that mirrors the first current.
12. The circuit of claim 9 , wherein the second circuit is a complementary-to-absolute-temperature circuit which further comprises:
a PNP bipolar transistor, whose base and collector are coupled with an electrical ground;
a resistor with its first end coupled to ground;
two PMOS transistors, whose drains are respectively coupled with the negative and the positive input terminals of the second differential amplifier, whose sources are coupled with the voltage source, and whose gates are coupled together at an output terminal of the second differential amplifier, and
wherein the positive input terminal of the second differential amplifier is coupled with the emitter of the PNP bipolar transistor and the negative input terminal is coupled with the resistor at its second end.
13. The circuit of claim 9 further comprising a start-up circuit for providing an initial current to the first circuit.
14. The circuit of claim 13 wherein the start-up circuit further comprises a NMOS transistor and a first PMOS transistor coupled in series with a gate of a second PMOS transistor coupled to drains of the first PMOS transistor and the NMOS transistor.
15. A bandgap reference circuit operating under a voltage source no more than 1 volt comprising:
a proportional-to-absolute-temperature (PTAT) circuit having a first differential amplifier for generating a first current;
a complementary-to-absolute-temperature (CTAT) circuit having a second differential amplifier for generating a second current; and
a bandgap reference voltage output module comprising two pull-up PMOS transistors each connected serially with a summation resistor at its drain for combining the first current and the second current,
wherein the complementary-to-absolute-temperature circuit further comprises:
a first resistor coupled between an electrical ground and a negative input terminal of the second differential amplifier, wherein a positive input terminal of the second differential amplifier is coupled to a negative input terminal of the first differential amplifier
wherein a bandgap reference voltage is provided at the drains of the two pull-up PMOS transistors of the bandgap reference voltage output module, and
wherein the first current increases while the second current decreases with the increase of temperature, thereby the PTAT and CTAT circuits offset each other so that the bandgap reference voltage is temperature insensitive.
16. The circuit of claim 15 , the proportional-to-absolute-temperature circuit further comprises:
a first and a second PNP bipolar transistors with both bases and collectors coupled with an electrical ground, and an emitter of the first PNP bipolar transistor coupled to a negative input terminal of the first differential amplifier through a first resistor and an emitter of the second PNP bipolar transistor coupled to a positive input terminal of the first differential amplifier; and
two PMOS transistors, whose drains are respectively coupled with negative and positive input terminals of the first differential amplifier, whose sources are coupled with the voltage source, and whose gates are coupled together with an output terminal of the first differential amplifier.