Low voltage mixer

1. A mixer comprising:

a pair of low frequency mixer inputs for receiving a low frequency input signal therebetween;

a pair of high frequency mixer inputs for receiving a high frequency input signal therebetween;

a pair of mixer outputs;

four switching units, each switching unit comprising a low frequency switching unit input, a high frequency switching unit input, a switching unit output, a node connected via a high pass filter to the respective high frequency switching unit input and via a low pass filter to the respective low frequency switching unit input and a switching device arranged to provide an output at the respective switching unit output in dependence on the voltage at the respective node;

a first one of the low frequency mixer inputs being connected to the low frequency inputs of a first and a second one of the switching units;

a second one of the low frequency mixer inputs being connected to the low frequency inputs of a third and a fourth one of the switching units;

a first one of the high frequency mixer inputs being connected to the high frequency inputs of the first and the fourth ones of the switching units;

a second one of the high frequency mixer inputs being connected to the high frequency inputs of the second and the third ones of the switching units;

a first one of the mixer outputs being connected to the outputs of the first and the third ones of the switching units; and

a second one of the mixer outputs being connected to the outputs of the second and the fourth ones of the switching units;

and the mixer further comprising:

a first feedback loop responsive to the voltage at the first low frequency mixer input and arranged to regulate the current through the outputs of the first and second ones of the switching units so that the total current through the outputs of the first and second ones of the switching units is substantially proportional to the voltage at the first low frequency mixer input; and

a second feedback loop responsive to the voltage at the second low frequency mixer input and arranged to regulate the current through the outputs of the third and fourth ones of the switching units so that the total current through the outputs of the third and fourth ones of the switching units is substantially proportional to the voltage at the second low frequency mixer input.

2. A mixer as claimed in claim 1 , wherein the high pass filter comprises a capacitive element.

3. A mixer as claimed in claim 1 , wherein the low pass filter comprises a resistive element.

4. A mixer as claimed in claim 1 , wherein the high frequency input signal has a frequency greater than 1 GHz.

5. A mixer as claimed in claim 1 , wherein the low frequency input signal has a frequency less than 10 MHz.

6. A mixer as claimed in claim 1 , wherein the first feedback loop comprises a first differential amplifier and a first resistor and the second feedback loop comprises a second differential amplifier and a second resistor.

7. A mixer as claimed in claim 6 , wherein the differential amplifiers have two input terminals and an output terminal and wherein the first differential amplifier has a first input terminal connected to the first low frequency mixer input, a second input terminal connected to a reference input of the first and second switching units and an output terminal connected to the low pass filters of the first and second switching units and the second differential amplifier has a first input terminal connected to the second low frequency mixer input, a second input terminal connected to a reference input of the third and fourth switching units and an output terminal connected to the low pass filters of the third and fourth switching units.

8. A mixer as claimed in claim 1 , wherein each switching device comprises a transistor.

9. A mixer as claimed in claim 8 , wherein means are provided for biasing each transistor.

10. A mixer as claimed in claim 8 , wherein the biasing means are arranged such that each transistor operates in saturation mode.

11. A mixer as claimed in claim 8 , wherein the biasing means for the first and second switching units comprise the first feedback loop and the biasing means for the third and fourth switching units comprise the second feedback loop.

12. A radio transceiver comprising a mixer as claimed in claim 1 , and wherein the pair of low frequency mixer inputs are connected to receive a baseband signal therebetween, the pair of high frequency mixer inputs are connected to receive a local oscillator signal therebetween and the mixer outputs are connected to a transmitter output.

13. An integrated circuit comprising a mixer as claimed in claim 1 , and wherein the pair of low frequency mixer inputs are connected to receive a baseband signal therebetween, the pair of high frequency mixer inputs are connected to receive a local oscillator signal therebetween and the mixer outputs are connected to a transmitter output.