Semiconductor device having super junction structure and method for manufacturing the same

1. A semiconductor device comprising:

a cell region including a plurality of semiconductor switching cells;

a terminal region disposed around the cell region;

a lower semiconductor layer having a first conductive type;

an intermediate semiconductor layer disposed on the lower semiconductor layer, wherein the intermediate semiconductor layer includes a super junction structure, in which a first region having the first conductive type and a second region having a second conductive type are repeatedly arranged in a horizontal direction perpendicular to a thickness direction of the intermediate semiconductor layer, and wherein the first region extends in the thickness direction of the intermediate semiconductor layer, and the second region extends in the thickness direction of the intermediate semiconductor layer;

a terminal upper semiconductor layer disposed on the intermediate semiconductor layer in the terminal region, wherein the terminal upper semiconductor layer has the second conductive type and a low impurity concentration;

a terminal contact semiconductor region disposed on a surface portion of the terminal upper semiconductor layer in the terminal region, wherein the terminal contact semiconductor region is disposed adjacent to the cell region, and wherein the terminal contact semiconductor region has the second conductive type and a high impurity concentration;

an insulation layer disposed on the terminal upper semiconductor layer in the terminal region, wherein the insulation layer has first and second parts, the first part which is disposed adjacent to the cell region and has a small thickness, and the second part which is disposed adjacent to the first part of the insulation layer and has a large thickness, and wherein the first part of the insulation layer is disposed on the terminal contact semiconductor region and on a part of the terminal upper semiconductor layer; and

a conductive layer disposed in the cell region and a part of the terminal region, wherein the conductive layer is disposed on the first part of the insulation layer and on a part of the second part of the insulation layer so that the conductive layer extends from the cell region to the part of the terminal region beyond the first part of the insulation layer.

2. The device according to claim 1 , wherein

the terminal contact semiconductor region includes an edge, which is opposite to the cell region,

the first part of the insulation layer includes an edge, which is opposite to the cell region,

the conductive layer includes an edge, which is opposite to the cell region,

a first length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the first part of the insulation layer,

a second length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the conductive layer, and

a ratio between the first length and the second length is in a range between 0.13 and 0.61.

3. The device according to claim 1 , wherein

the terminal contact semiconductor region includes an edge, which is opposite to the cell region,

the first part of the insulation layer includes an edge, which is opposite to the cell region,

the super junction structure in the intermediate semiconductor layer includes an edge, which is opposite to the cell region,

a first length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the first part of the insulation layer,

a third length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the super junction structure, and

a ratio between the first length and the third length is in a range between 0.08 and 0.39.

4. The device according to claim 1 , wherein

the terminal contact semiconductor region includes an edge, which is opposite to the cell region,

the conductive layer includes an edge, which is opposite to the cell region,

the super junction structure in the intermediate semiconductor layer includes an edge, which is opposite to the cell region,

a second length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the conductive layer,

a third length is defined as a distance between the edge of the terminal contact semiconductor region and the edge of the super junction structure, and

a ratio between the second length and the third length is in a range between 0.41 and 0.90.

5. The device according to claim 1 , further comprising:

a second conductive type semiconductor region adjacent to the terminal contact semiconductor region, wherein

the second conductive type semiconductor region is disposed on another surface portion of the terminal upper semiconductor layer in the terminal region, and

the second conductive type semiconductor region has the second conductive type and an impurity concentration, which is lower than that of the terminal contact semiconductor region, and higher than that of the terminal upper semiconductor layer.

6. A semiconductor device comprising:

a cell region including a plurality of semiconductor switching cells;

a terminal region disposed around the cell region;

a lower semiconductor layer having a first conductive type;

an intermediate semiconductor layer disposed on the lower semiconductor layer, wherein the intermediate semiconductor layer includes a super junction structure, in which a first region having the first conductive type and a second region having a second conductive type are repeatedly arranged in a horizontal direction perpendicular to a thickness direction of the intermediate semiconductor layer, and wherein the first region extends in the thickness direction of the intermediate semiconductor layer, and the second region extends in the thickness direction of the intermediate semiconductor layer;

a terminal upper semiconductor layer disposed on the intermediate semiconductor layer in the terminal region, wherein the terminal upper semiconductor layer has the second conductive type and a low impurity concentration;

a terminal contact semiconductor region disposed on a surface portion of the terminal upper semiconductor layer in the terminal region, wherein the terminal contact semiconductor region is disposed adjacent to the cell region, and wherein the terminal contact semiconductor region has the second conductive type and a high impurity concentration;

a second conductive type semiconductor region adjacent to the terminal contact semiconductor region, wherein the second conductive type semiconductor region is disposed on another surface portion of the terminal upper semiconductor layer in the terminal region, and wherein the second conductive type semiconductor region has the second conductive type and an impurity concentration, which is lower than that of the terminal contact semiconductor region, and higher than that of the terminal upper semiconductor layer;

an insulation layer disposed on a part of the terminal contact semiconductor region and on the terminal upper semiconductor layer in the terminal region; and

a conductive layer disposed on another part of the terminal contact semiconductor region and on a part of the insulation layer.

7. A method for manufacturing a semiconductor device including a cell region and a terminal region disposed around the cell region, wherein the cell region includes a plurality of semiconductor switching cells, the method comprising steps of:

preparing a lower semiconductor layer having a first conductive type;

forming an intermediate semiconductor layer on the lower semiconductor layer, wherein the intermediate semiconductor layer includes a super junction structure, in which a first region having the first conductive type and a second region having a second conductive type are repeatedly arranged in a horizontal direction perpendicular to a thickness direction of the intermediate semiconductor layer, and wherein the first region extends in the thickness direction of the intermediate semiconductor layer, and the second region extends in the thickness direction of the intermediate semiconductor layer;

forming a terminal upper semiconductor layer on the intermediate semiconductor layer in the terminal region, wherein the terminal upper semiconductor layer has the second conductive type and a low impurity concentration;

forming a terminal contact semiconductor region on a surface portion of the terminal upper semiconductor layer in the terminal region, wherein the terminal contact semiconductor region is disposed adjacent to the cell region, and wherein the terminal contact semiconductor region has the second conductive type and a high impurity concentration;

forming an insulation layer on the terminal upper semiconductor layer in the terminal region, wherein the insulation layer has first and second parts, the first part which is disposed adjacent to the cell region and has a small thickness, and the second part which is disposed adjacent to the first part of the insulation layer and has a large thickness, and wherein the first part of the insulation layer is disposed on the terminal contact semiconductor region and on a part of the terminal upper semiconductor layer; and

forming a conductive layer in the cell region and a part of the terminal region, wherein the conductive layer is disposed on the first part of the insulation layer and on a part of the second part of the insulation layer so that the conductive layer extends from the cell region to the part of the terminal region beyond the first part of the insulation layer.