IP Library Granted Patent US 7,366,806
Granted Patent B2
US 7,366,806 · App. 10/900,638 · Granted Apr 29, 2008

Method and apparatus for RFID tag wherein memory of RFID tag is partitioned into two sections for reading using wireless interface and writing using bus

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,366,806
App. No.
10/900,638
Granted
Apr 29, 2008
Kind
B2
Abstract

Methods and apparatus for correlating physical and logical attributes of devices include associating logical-tags (L-tags) and physical-tags (P-tags) with electronic devices. A P-tag includes a P-tag identifier, which can be read by a P-tag reading device, regardless of whether power is applied to the electronic device. In one embodiment, a system includes a P-tag comprising a radio frequency identification (RFID) tag having a non-volatile memory to store physical and logical attribute information; and an electronic device associated with the RFID tag, the electronic device having a processor and a bus, and being communicatively coupled to the RFID tag over the bus, the processor to execute instructions to read information from and write information to the non-volatile memory of the RFID tag.

Claims (16)

1. A system comprising:

a radio frequency identification (RFID) tag comprising a non-volatile memory to store physical and logical attribute information;

an electronic device associated with the RFID tag, the electronic device having a processor and a bus, and being communicatively coupled to the RFID tag over the bus, the processor to execute instructions to read information from and write information to the non-volatile memory of the RFID tag; and

a RFID tag reading device to read information from and write information to the non-volatile memory of the RFID tag over a wireless interface;

wherein the non-volatile memory of the RFID tag is partitioned into at least two sections, the electronic device to write to a first section using the bus and the RFID tag reading device to write to a second section using the wireless interface.

2. The system of claim 1 , wherein the RFID tag reading device reads information from the RFID tag when the electronic device associated with the RFID tag is powered off.

3. The system of claim 1 , wherein the bus comprises a system management bus (SMBUS).

4. The system of claim 1 , wherein the RFID tag is attached to the electronic device.

5. The system of claim 1 , wherein the electronic device comprises a computer system, and the RFID tag is physically attached to a motherboard of the computer system.

6. A method comprising:

storing at least one of physical and logical attribute information of an electronic device in a second section of a non-volatile memory on an RFID tag using an RFID tag reading/writing device over a wireless interface;

associating the RFID tag with the electronic device;

storing at least one of physical and logical attribute information in a first section of the non-volatile memory on the RFID tag by the electronic device over a bus; and

reading the RFID tag by the RFID tag reading/writing device over the wireless interface to obtain the at least one of physical and logical attribute information.

7. The method of claim 6 , further comprising reading at least one of physical and logical attribute information stored on the RFID tag by the electronic device by accessing the non-volatile memory of the RFID tag over the bus communicatively coupling the RFID tag and the electronic device.

8. The method of claim 6 , wherein the electronic device comprises a computer system, and the bus comprises a system management bus (SMBUS).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2004
From: MILENKOVIC, MILAN; TEWARI, VIJAY
To: INTEL CORPORATION
Reel/Frame 015881/0674 →
Continuity (1)
Related Publication 20060026316A1 · Feb 2, 2006