Single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology
A low noise amplifier has the properties of low noise figure and high gain under a high-frequency operation. The low noise amplifier includes a first transistor, a first inductive impedance, a first gate voltage source, a matching circuit, an input, a second inductive impedance, a second transistor, a first capacitive impedance, a second gate voltage source, a third transistor, a third gate voltage source, a second capacitive impedance, a first impedance, a second impedance, a direct current source, a first output, a second output, a first resistor, a second resistor, a third resistor, a first bulk voltage source, a second bulk voltage source, and a third bulk voltage source.
1. A single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology, the low noise amplifier comprising:
a first transistor;
a first inductive impedance having a first terminal connected to the source of the first transistor, and a second terminal coupled to ground;
a first gate voltage source coupled to the gate of the first transistor;
a matching circuit having a first terminal coupled to the gate of the first transistor;
an input coupled to a third terminal of the matching circuit;
a second inductive impedance having a first terminal connected to the drain of the first transistor;
a second transistor, the source of the second transistor connected to a second terminal of the second inductive impedance;
a first capacitive impedance having a first terminal connected to the drain of the first transistor, and a second terminal connected to the gate of the second transistor;
a second gate voltage source coupled to the gate of the second transistor;
a third transistor, the source of the third transistor connected to the drain of the first transistor;
a third gate voltage source coupled to the gate of the third transistor;
a second capacitive impedance having a first terminal connected to the gate of the third transistor, and a second terminal connected to ground;
a first output impedance having a first terminal connected to the drain of the second transistor;
a second output impedance having a first terminal connected to the drain of the third transistor;
a direct current voltage source connected to a second terminal of the first impedance and a second terminal of the second impedance;
a first output connected to the drain of the second transistor; and
a second output connected to the drain of the third transistor.
2. The low noise amplifier of claim 1 wherein the first transistor, the second transistor, and the third transistor are N-type metal oxide semiconductors field-effect transistor.
3. The low noise amplifier of claim 2 wherein the bulk of the first transistor is connected to the source of the first transistor.
4. The low noise amplifier of claim 2 wherein the bulk of the second transistor is connected to the source of the second transistor, and the bulk of the third transistor is connected to the source of the third transistor.
5. The low noise amplifier of claim 1 wherein the bulk of the first transistor is connected to ground or a direct current voltage source.
6. The low noise amplifier of claim 1 wherein the bulk of the second transistor is connected to ground or a direct current voltage source, and the bulk of the third transistor is connected to ground or a direct voltage source.
7. The low noise amplifier of claim 2 further comprising:
a first resistor connected to the gate of the first transistor and the first gate voltage source;
a second resistor connected to the gate of the second transistor and the second gate voltage source; and
a third resistor connected to the gate of the third transistor and the third gate voltage source.
8. The low noise amplifier of claim 1 wherein the first transistor, the second transistor, and the third transistor are NPN bipolar junction transistors (NPN BJT).
9. A single-ended input to a differential-ended output low noise amplifier implemented with cascode and cascade topology, the low noise amplifier comprising:
a first transistor;
a first inductive impedance having a first terminal connected to the drain of the first transistor;
a first gate voltage source coupled to the gate of the first transistor;
a matching circuit having a first terminal coupled to the gate of the first transistor;
an input coupled to a second terminal of the matching circuit;
a second inductive impedance having a first terminal connected to the source of the first transistor;
a second transistor, the drain of the second transistor connected to the second terminal of the second inductive impedance;
a first capacitive impedance having a first terminal connected to the source of the first transistor, and a second terminal connected to the gate of the second transistor;
a second gate voltage source coupled to the gate of the second transistor;
a third transistor, the drain of the third transistor connected to the source of the first transistor;
a third gate voltage source coupled to the gate of the third transistor;
a second capacitive impedance having a first terminal connected to the gate of the third transistor;
a first impedance having a first terminal connected to the source of the second transistor, and a second terminal connected to ground;
a second impedance having a first terminal connected to the source of the third transistor, and a second terminal connected to ground;
a direct current voltage source connected to a second terminal of the first inductive impedance, a third terminal of the matching circuit, and a second terminal of the second capacitive impedance;
a first output connected to the source of the second transistor; and
a second output connected to the source of the third transistor.
10. The low noise amplifier of claim 9 wherein the first transistor, the second transistor, and the third transistor are P-type metal oxide semiconductors field-effect transistor.
11. The low noise amplifier of claim 10 wherein the bulk of the first transistor is connected to the source of the first transistor.
12. The low noise amplifier of claim 10 wherein the bulk of the second transistor is connected to the source of the second transistor, and the bulk of the third transistor is connected to the source of the third transistor.
13. The low noise amplifier of claim 9 wherein the bulk of the first transistor is connected to ground or a direct current voltage source.
14. The low noise amplifier of claim 9 wherein the bulk of the second transistor is connected to ground or a direct current voltage source, and the bulk of the third transistor is connected to ground or a direct current voltage source.
15. The low noise amplifier of claim 10 further comprising:
a first resistor connected to the gate of the first transistor and the first gate voltage source;
a second resistor connected to the gate of the second transistor and the second gate voltage source; and
a third resistor connected to the gate of the third transistor and the third gate voltage source.
16. The low noise amplifier of claim 9 wherein the first transistor, the second transistor, and the third transistor are PNP bipolar junction transistors (PNP BJT).