IP Library Granted Patent US 7,395,385
Granted Patent B2
US 7,395,385 · App. 11/300,388 · Granted Jul 1, 2008

Memory management for a mobile multimedia processor

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Quick Facts
Patent No.
US 7,395,385
App. No.
11/300,388
Granted
Jul 1, 2008
Kind
B2
Abstract

Certain embodiments of the invention may be found in a method for memory management for a mobile multimedia processor. The method may comprise receiving within a mobile multimedia processor chip a plurality of memory requests. The plurality of memory requests may be handled by allocating memory from at least one on-chip memory block and/or at least one off-chip memory block. The memory may be allocated based on a priority level of each of the plurality of memory requests and at least one dynamically settable global memory allocation priority threshold. A new dynamically settable global memory allocation priority threshold may be dynamically determined based on a new application and/or by monitoring at least one software process in at least one present application. Additionally, new memory request priority level may be dynamically determined for each memory request in at least one software process in a new application.

Claims (26)

1. A method for managing memory, the method comprising:

receiving within a mobile multimedia processor chip a plurality of memory requests;

handling said plurality of memory requests by allocating memory from: at least one on-chip memory block and at least one off-chip memory block; and

said allocating memory based on a priority level of each of said plurality of memory requests and at least one dynamically settable global memory allocation priority threshold.

2. The method according to claim 1 , comprising dynamically determining a new said at least one dynamically settable global memory allocation priority threshold based on a new application.

3. The method according to claim 1 , comprising dynamically determining a new said at least one dynamically settable global memory allocation priority threshold by monitoring at least one software process in at least one present application.

4. The method according to claim 1 , comprising dynamically determining a new said priority level for said each of said plurality of memory requests in at least one software process in a new application.

5. The method according to claim 1 , comprising dynamically determining a new said priority level for at least one of said plurality of memory requests in at least one software process by monitoring said at least one software process in at least one present application.

6. The method according to claim 1 , comprising specifying one of said at least one on-chip memory block and said at least one off-chip memory block from which to said allocate memory.

7. The method according to claim 1 , comprising moving data in said allocated memory to a different one of said at least one on-chip memory block and said at least one off-chip memory block.

8. The method according to claim 7 , comprising locking said data to prevent said moving of said data.

9. The method according to claim 7 , comprising unlocking said data to allow said moving of said data.

10. The method according to claim 9 , wherein said data is not accessible to processes when said data is said unlocked, except to said move said data.

11. A machine-readable storage having stored thereon, a computer program having at least one code section for memory management for a mobile multimedia processor, the at least one code section being executable by a machine comprising the mobile multimedia processor for causing the machine to perform steps comprising:

receiving within a mobile multimedia processor chip a plurality of memory requests;

handling said plurality of memory requests by allocating memory from: at least one on-chip memory block and at least one off-chip memory block; and

said allocating memory based on a priority level of each of said plurality of memory requests and at least one dynamically settable global memory allocation priority threshold.

12. The machine-readable storage according to claim 11 , comprising code for dynamically determining a new said at least one dynamically settable global memory allocation priority threshold based on a new application.

13. The machine-readable storage according to claim 11 , comprising code for dynamically determining a new said at least one dynamically settable global memory allocation priority threshold by monitoring at least one software process in at least one present application.

14. The machine-readable storage according to claim 11 , comprising code for dynamically determining a new said priority level for said each of said plurality of memory requests in at least one software process in a new application.

15. The machine-readable storage according to claim 11 , comprising code for dynamically determining a new said priority level for at least one of said plurality of memory requests in at least one software process by monitoring said at least one software process in at least one present application.

16. The machine-readable storage according to claim 11 , comprising code for specifying one of said at least one on-chip memory block and said at least one off-chip memory block from which to said allocate memory.

17. The machine-readable storage according to claim 11 , comprising code for moving data in said allocated memory to a different one of said at least one on-chip memory block and said at least one off-chip memory block.

18. The machine-readable storage according to claim 11 , comprising code for locking said data to prevent said moving of said data.

19. The machine-readable storage according to claim 17 , comprising code for unlocking said data to allow said moving of said data.

20. The machine-readable storage according to claim 19 , wherein said data is not accessible to processes when said data is said unlocked, except to said move said data.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2006
From: COBLEY, DOMINIC
To: BROADCOM CORPORATION
Reel/Frame 017513/0555 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2006
From: COBLEY, DMINIC
To: BROADCOM CORPORATION
Reel/Frame 017219/0025 →