Liquid crystal display device and method for fabricating the same
A liquid crystal display device according to an embodiment of the present invention a includes: a gate line on a substrate; a data line crossing the gate line to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern extended from the thin film transistor to overlap along the data line; a gate insulating pattern that overlaps along the semiconductor pattern to insulate the gate line and the data line; a pixel electrode in the pixel area spaced apart from the gate line and the data line and connected to the thin film transistor; and a passivation film formed in an area where the pixel electrode is not present to form a border with the pixel electrode.
1. A method of fabricating a liquid crystal display device, comprising:
a first mask process of forming a gate line on a substrate and a gate electrode connected to the gate line;
a second mask process of forming a source/drain metal pattern including a data line crossing the gate line to define a pixel area, a source electrode connected to the data line, a drain electrode facing the source electrode, a semiconductor pattern that overlaps along and under the source/drain metal pattern to form a channel between the source electrode and the drain electrode, and a gate insulating pattern that overlaps along and under the semiconductor pattern; and
a third mask process of forming a pixel electrode in the pixel area connected to the drain electrode and spaced apart from the gate line and the data line, and forming a passivation film that forms a border with the pixel electrode,
wherein the third mask process includes:
forming a transparent conductive film on the source/drain metal pattern;
forming a photo-resist pattern on the transparent conductive film;
forming a transparent conductive pattern including the pixel electrode, the pad upper electrode, and the contact electrode by an etching process using the photo-resist pattern as a mask;
forming a passivation film which completely covers the photo-resist pattern; and
patterning the passivation film by removing the photo-resist pattern where the passivation film is formed.
2. The method according to claim 1 , wherein the second mask process further includes:
forming a storage upper electrode that overlaps the gate line and connects to the pixel electrode and a gate insulating pattern and a semiconductor pattern that are formed on the gate line to overlap the storage upper electrode.
3. The method according to claim 1 , wherein:
the second mask process further includes:
forming a pad lower electrode that is connected to at least one of the gate line and the data line and a semiconductor pattern and a gate insulating pattern that overlap under the pad lower electrode; and
forming a contact hole that penetrates from the pad lower electrode to the gate insulating pattern, and
the third mask process further includes:
forming a pad upper electrode that overlaps the pad lower electrode through the contact hole to connect to the pad lower electrode.
4. The method according to claim 3 , wherein:
the first mask process further includes:
forming a first gate link extended from the gate line;
the second mask process further includes:
forming a second gate link extended with the semiconductor pattern and the gate insulating pattern from the pad lower electrode that is connected to the gate line; and
forming a second contact hole that penetrates the gate insulating pattern to the second gate link to expose the first gate link; and
the third mask process further includes:
forming a contact electrode that overlaps the first and second gate links through the second contact hole to connect the first gate link to the second gate link.
5. The method according to claim 4 , wherein the passivation film forms a border with the pad upper electrode and the contact electrode.
6. The method according to claim 4 , wherein the contact hole penetrating to the pad lower electrode connected to the second gate link is extended along the second gate link to form the second contact hole, and the pad upper electrode is extended along the second gate link to form the contact electrode.
7. The method according to claim 4 , wherein the pixel electrode, the pad upper electrode, and the contact electrode are formed of a transparent conductive film.
8. The method according to claim 4 , wherein the second mask process includes:
forming a gate insulating film, a semiconductor layer, and a source/drain metal layer on the gate line, and the gate electrode;
forming photo-resist patterns with different thicknesses by using one of a diffractive exposure mask and a partial transmission mask;
forming the source/drain meal pattern including a drain electrode integrated with the source electrode, the semiconductor pattern and the gate insulating pattern and forming the contact hole and the second contact hole by an etching process using the photo-resist pattern as a mask; and
etching the source/drain metal pattern exposed through the photo-resist pattern and an ohmic contact layer of the semiconductor pattern.
9. The method according to claim 1 , wherein forming the photo-resist pattern includes:
forming a first photo-resist on the transparent conductive film;
forming a second photo-resist pattern on the first photo-resist by a photolithography process; and
forming a first photo-resist pattern that is overlapped by the second photo-resist pattern, by patterning the first photo-resist.
10. The method according to claim 9 , wherein the second photo-resist pattern is formed of a photo-acryl.
11. The method according to claim 9 , wherein the first photo-resist pattern is over-etched versus the second photo-resist pattern.
12. The method according to claim 1 , wherein the passivation film is formed by a sputtering method.
13. The method according to claim 1 , wherein the transparent conductive pattern is over-etched versus the photo-resist pattern.
14. The method according to claim 13 , wherein the transparent conductive film is etched by a wet etching.