Apparatus and method of using spread pulse modulation to increase the control resolution of an electronic device
An apparatus and method are described to increase the control resolution of an electronic device. In one embodiment, the invention includes a spread pulse modulation module to generate a first set of bits based on a second set of bits that is larger than the first set of bits. The spread pulse modulation module modulates the least significant bit (LSB) of the first set of bits based on information including the LSB modulation period and the LSB modulation duty cycle. The spread pulse modulation module also modulates the least significant bit of the first set of bits so that the least significant bit transitions at least twice from a high value to a low value during the modulation period. This embodiment of the invention also includes a digital-to-analog conversion module to generate an analog input signal to the electronic device based on the first set of bits.
1. An apparatus to increase the control resolution of an electronic device, comprising:
a spread pulse modulation module to generate a first set of bits based on a second set of bits, wherein the second set of bits is larger than the first set of bits, and wherein the spread pulse modulation module performs a first modulation of the least significant bit of the first set of bits based on information including a period of the first modulation and a duty cycle of the first modulation, and wherein the least significant bit transitions at least twice from a high value to a low value during the period of the first modulation, and wherein a control signal input to the electronic device is determined based on the first set of bits.
2. The apparatus of claim 1 , wherein the least significant bit transitions on an edge of an update clock, and wherein the number of update clock cycles in a period of the first modulation is a power of two.
3. The apparatus of claim 2 , wherein the control signal input to the electronic device is an analog signal output of a digital-to-analog conversion module.
4. The apparatus of claim 3 , wherein the digital-to-analog conversion module is updated once per update clock cycle.
5. The apparatus of claim 3 , wherein the digital-to-analog conversion module is updated on change of the first set of bits.
6. The apparatus of claim 1 , further comprising a processing module to generate the second set of bits.
7. The apparatus of claim 6 , wherein the processing module uses open loop control to generate the second set of bits.
8. The apparatus of claim 6 , wherein the processing module uses closed loop control to generate the second set of bits.
9. The apparatus of claim 8 , wherein the closed loop processing module generates the second set of bits based on at least one of temperature measurements, voltage measurements, frequency measurements, and circuit age measurements.
10. The apparatus of claim 6 , wherein the spread pulse modulation module performs a second modulation of the duty cycle of the first modulation, based on information including a period of the second modulation and a duty cycle of the second modulation.
11. The apparatus of claim 10 , wherein the processing module configures the period of the first modulation and the period of the second modulation.
12. An method for increasing the control resolution of an electronic device, comprising:
generating a first set of bits based on a second set of bits, wherein the second set of bits is larger than the first set of bits, and wherein the generating of the first set of bits includes performing a first modulation of the least significant bit of the first set of bits based on information including a period of the first modulation and a duty cycle of the first modulation, and wherein the least significant bit transitions at least twice from a high value to a low value during the period of the first modulation, and wherein a control signal input to the electronic device is determined based on the first set of bits.
13. The method of claim 12 , wherein the least significant bit transitions on an edge of an update clock, and wherein the number of update clock cycles in a period of the first modulation is a power of two.
14. The method of claim 13 , wherein the control signal input to the electronic device is an analog signal output of a digital-to-analog conversion module.
15. The method of claim 12 , further comprising generating the second set of bits.
16. The method of claim 15 , wherein the generating of the second set of bits is through open loop control.
17. The method of claim 15 , wherein the generating of the second set of bits is through closed loop control.
18. The method of claim 17 , wherein the generating of the second set of bits is based on at least one of temperature measurements, voltage measurements, frequency measurements, and circuit age measurements.
19. The method of claim 15 , wherein the generating of the first set of bits includes performing a second modulation of the duty cycle of the first modulation, based on information including a period of the second modulation and a duty cycle of the second modulation.
20. The method of claim 19 , further comprising configuring the period of the first modulation and the period of the second modulation.