IP Library › Granted Patent US 7,449,777
Granted Patent B2
US 7,449,777 · App. 11/238,677 · Granted Nov 11, 2008

Circuit arrangement comprising a power component and a drive circuit integrated in two semiconductor bodies

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 7,449,777
App. No.
11/238,677
Granted
Nov 11, 2008
Kind
B2
Abstract

A circuit arrangement comprises at least one power component and a drive circuit for the power component, which are integrated in a first and a second semiconductor chip. Only CMOS components of the drive circuit or CMOS components, capacitive components and resistance components of the drive circuit are integrated in the first semiconductor chip, and the at least one power component and further components of the drive circuit are integrated in the second semiconductor chip.

Claims (27)

1. A circuit arrangement including at least one power component and a drive circuit operable to drive the at least one power component, the circuit arrangement comprising:

a first semiconductor chip, wherein only CMOS components of the drive circuit or CMOS components, capacitive components and resistance components of the drive circuit are integrated in the first semiconductor chip; and

a second semiconductor chip, wherein the at least one power component is integrated in the second semiconductor chip and wherein further components of the drive circuit not integrated in the first semiconductor chip are integrated in the second semiconductor chip.

2. The circuit arrangement of claim 1 , wherein the further components of the drive circuit comprise bipolar components.

3. The circuit arrangement of claim 1 , wherein the further components of the drive circuit comprise components resistant to predetermined high voltages with a dielectric strength greater than the dielectric strength of the CMOS components.

4. The circuit arrangement of claim 1 wherein the at least one power component is a power MOSFET.

5. The circuit arrangement of claim 1 wherein the at least one power component is a lateral power MOSFET comprising a source zone, a drift zone, a body zone arranged between the source zone and the drift zone, a drain zone adjacent to the drift zone, and a gate electrode arranged in a manner insulated from the body zone.

6. The circuit arrangement of claim 5 wherein the drift zone includes complementarily doped semiconductor zones arranged next to one another.

7. The circuit arrangement of claim 6 wherein the complementarily doped semiconductor zones extend into the second semiconductor chip in a vertical direction proceeding from a front side of the second semiconductor chip.

8. The circuit arrangement of claim 1 wherein the drive circuit is a drive circuit operable to drive a power transistor in a switching converter.

9. The circuit arrangement of claim 1 wherein the power components comprise at least two power MOSFETs connected as a half-bridge.

10. The circuit arrangement of claim 9 wherein the drive circuit is a drive circuit for driving a half-bridge in a lamp ballast.

11. A method of arranging a circuit including at least one power component and a drive circuit, the method comprising the steps of:

providing a first semiconductor chip, wherein only CMOS components of the drive circuit or CMOS components, capacitive components and resistance components of the drive circuit are integrated in the first semiconductor chip;

providing a second semiconductor chip, wherein the at least one power component is integrated in the second semiconductor chip and wherein further components of the drive circuit not integrated in the first semiconductor chip are integrated in the second semiconductor chip; and

connecting the first semiconductor chip and the second semiconductor chip.

12. The method of claim 11 further comprising the step of mounting the first semiconductor chip and the second semiconductor chip on a common carrier.

13. The method of claim 12 further comprising the step of surrounding the first semiconductor chip and the second semiconductor chip by a common housing.

14. The method of claim 11 , wherein the further components of the drive circuit comprise bipolar components.

15. The method of claim 11 , wherein the further components of the drive circuit comprise components resistant to high voltages with a dielectric strength greater than the dielectric strength of the CMOS components.

16. A circuit arrangement comprising:

a first semiconductor chip comprising a first set of components of a drive circuit, wherein the first set of components consist of components integrated by CMOS processes; and

a second semiconductor chip connected to the first semiconductor chip, the second semiconductor chip comprising at least one power component and a second set of components of the drive circuit, wherein the drive circuit is operable to drive the at least one power component.

17. The circuit arrangement of claim 16 wherein the components integrated by CMOS processes include CMOS components, capacitive components, and resistance components of the drive circuit.

18. The circuit arrangement of claim 16 further comprising a common carrier, wherein the first semiconductor chip and the second semiconductor chip are mounted on the common carrier.

19. The circuit arrangement of claim 16 further comprising a common housing, wherein the first semiconductor chip and the second semiconductor chip are surrounded by the common housing.

20. The circuit arrangement of claim 16 wherein the second set of components of the drive circuit comprise bipolar components.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2005
From: DEBOY, GERALD; FAHLENKAMP, MARC
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017350/0182 →
Priority Claims (1)
DE 10 2004 047 358 · Sep 29, 2004 · national
Continuity (1)
Related Publication 20060071237A1 · Apr 6, 2006